A SPARC CPU Overview: SPARC64-VII+ (M3), T3, T4, T5, M5, M10 - how do they compare?

Do you know how many SPARC CPU types does Oracle deliver currently? Not one, not two, but five. The SPARC64-VII+, the T4, T5, M5 and M10. It isn't easy to keep track of these, hence we created an overview table to help you in that - here you are: 

CPU Type	SPARC64-VII+ (M3)	T3	T4	T5	M5	M10/SPARC64-X
Servers	M3000, M4000, M5000, M8000, M9000, M9000-64	T3-1, T3-2 T3-4	T4-1, T4-2 T4-4	T5-2, T5-4 T5-8	M5-32	M10-1, M10-4,  M10-4S
CPU Core Codename	Jupiter++	S2	S3	S3	S3	Athena
CPU Clockfrequency	2.66-3 GHz	1.65 GHz	2.85-3GHz	3.6 GHZ	3.6 GHZ	2.8-3 GHz
Number of Cores per socket	4	16	8	16	6	16
Number of Threads per core	2	8	8	8	8	2
Minimum amount of RAM, number of sockets, and threads per Server	8GB 1 socket 8 threads	8GB 1 socket 128 threads	16GB 1 socket 64 threads	256GB 2 sockets 256 threads	1TB 8 sockets 384 threads	32GB 1 socket 4 threads (2 cores activated from 16)
Maximum amount of RAM, number of sockets and threads per Server	4TB 64 sockets 512 threads	128 GB 4 sockets 512 threads	2TB 4 sockets 256 threads	4TB 8 sockets 1024 threads	32 TB 32 sockets 1536 threads	32TB 64 sockets 2048 threads
L3 Cache	no L3$ (12MB L2$ though!)	no L3$	4MB	8MB	48MB	no L3$ (24MB shared L2$ though!)
Virtualization supported	Dynamic Domains (and Zones)	LDoms (and Zones)	LDoms (and Zones)	LDoms (and Zones)	Hard Domains,  LDoms (and Zones)	LDoms (and Zones)
CPU architecture (ISA)	sun4u	sun4v	sun4v	sun4v	sun4v	sun4v
OS supported	Solaris 10, 11	Solaris 10, 11	Solaris 10, 11	Solaris 10, 11	Control Domain: S11 only. Guest Domains: Solaris 10, 11	Solaris 10, 11
noteworthy features	electronically separated domains	512 threads in 2010!	First S3 based, single thread AND throughput	1024 threads in 8 RU	Mainframe class, Mission critical	Software on Chip

Allow me to add some thought-triggering facts too:

• All the 6 of these CPUs have been released after Oracle taking over Sun.
• (Oracle also has released Solaris 10 Update 10, Solaris 10 u11, Solaris 11 and Solaris 11.1 since then!) 
• CPU cache is important: reading from RAM takes orders of magnitudes longer than from on-chip cache. 
• It takes 5 years from CPU design start to deliver. Here's a quick thought-experiment: 
• IF the T5 was already deep in the design phase before the acquisition in 2009, AND Oracle raised the investment into SPARC development THEN what can you assume about the next 1-3-5 years in terms of SPARC products?